Universal Serial Bus Specification Rev. 2.0
With USB 1.1, there were two Host Controller Interface Specifications, the UHCI (Universal Host Controller Interface) developed by Intel and the OHCI (Open Host Controller Interface) developed by Compaq, Microsoft and National Semiconductor.
With the introduction of USB 2.0 a new Host Controller Interface Specification was needed to describe the register level details specific to USB 2.0. The EHCI (Enhanced Host Controller Interface) was born which at the time of writing is at revision 1.0. Significant contributors include Intel, Compaq, NEC, Lucent and Microsoft so it would hopefully seem they have pooled together to provide us one interface standard and thus only one driver to implement in our operating systems.
Both XP and Windows 2000 USB 2.0 drivers should be available from the Windows Update site. However if you don't have a USB 2.0 card installed, it will not appear on the site (Windows Update searches your PCI bus for the VID/PIDs). Corporate IT Staff or developers who wish to copy it to multiple computers may download the driver from Corporate Windows Update site.
In the Linux camp, David Brownell and crew have been busy implementing EHCI. Monday the 14th of January 2002 saw the release of the 2.5.2 linux kernel which has USB 2.0 support built in. Once again Linux has support before Windows.
Philips semiconductor has two USB 2.0 compliant devices in development at the present moment. One is a USB transceiver, while the other is a USB function device.
ISP1581 Universal Serial Bus 2.0 High Speed Interface Device
Philips have scared many off with their ISP1581. At one stage their website indicated this was a discontinued product, however Wei Leong Chui (Marketing Manager) from Philips Semiconductor advises us that this isn't the case. In fact this part is all well and is now in production. Samples are available from your local Philips distributor.
What makes this product neat over its competitors is the easy bus interfacing and separate DMA / control buses. The ISP1581 has two modes of operation, Generic Processor mode and Split Bus Mode. In Generic Processor Mode it uses AD[7:0] as an address bus and DATA[15:0] as a 16 bit data bus shared by both the processor and DMA. The device has all the standard CS, ALE, R/W, RD, DS, WR pins so it can be mapped into memory on both Intel and Motorola style buses. In Split bus mode, the processor can control the device using AD[7..0] as a multiplexed data/address bus and use the DMA bus as a totally separate and independent bus to transfer data to and from the FIFOs.
ISP1501 Universal Serial Bus 2.0 Peripheral Transceiver
USBDeveloper.com's ISP1581 Evaluation Kits
Cypress Semiconductor currently has two USB 2.0 offerings, the FX-2 and SX-2. One includes a 8051 Microcontroller while the other is a DMA slave device designed to connect to a microprocessor or DSP. Cypress is well known for its re-numeration feature allowing USB devices with no firmware to enumerate as a default device, have code downloaded to it from the host and then re-enumerate as a different device executing the code freshly downloaded to it. It also provides enumeration in silicon, allowing the developer to code the interesting bits. . .
CY7C68013 EZ-USB FX2
The FX2 is a enhanced 8051 with re-numeration. It has 8kB of RAM on chip for soft loading of your program, but no ROM or FLASH. The device uses DMA to transfer data internally allowing it to reach burst data rates of 96Mbytes in and out of the device.
CY7C68001 EZ-USB SX2
The SX2 loses the 8051 in favour for becoming a slave device controlled by your DSP or microcontroller in a language and design environment that you are familiar with. It continues the EZ-USB tradition of silicon enumeration allowing the SX2 to read its Product and Vendor ID’s plus its descriptors from serial EEPROM (up to 1KB) on power up. This allows the device to enumerate all chapter 9 descriptors without need of interrupting the master processor. It has a on-board I2C master device which is used to connect to the serial EEPROM on boot-up and can be used under control of your host after bootup and initialisation making it ideal for digital image sensors and other devices running on a I2C bus.
Unlike the Philips ISP1581, the SX2 has three address pins to select FIFO2/4/6/8 or command operation and a 8/16-bit data bus shared for command and FIFO Data. Advanced information would also suggest it is missing an on board 3.3V regulator thus requiring external circuitry if used as a bus powered device. Never the less, the silicon numeration continues to put this device on the favourite list for many.
Opal Kelly's XEM3001 FPGA experimentation with High Speed USB 2.0 Interface
Bitwise System's QuickUSB Home of the Hi-Speed USB Module That Makes USB a Snap!
Cesys Spartan-II FPGA board with Cypress FX-2 USB 2.0 High Speed Interface
USBee EX 2.0 Experimenter's Board for USB 2.0 High Speed Development
NetChip Technology, Inc
Netchip Technology has two USB 2.0 peripheral controllers which can connect to many microcontroller, microprocessor or DSP systems without any additional glue logic. The NET 2280 is a USB 2.0 peripheral device with a PCI 2.2 compliant bus. The NET 2270 on the other hand is a smaller 16 bit peripheral housed in a 64 pin TQFP and has a simpler core without Auto-Enumerate.
Netchip continues to produce excellent documentation for their controllers. They provide a DMA split bus simular to that of the Philips ISP1581 allowing a DMA controller / FPGA to feed data in on the DMA bus while at the same time allowing the microcontroller to send commands and data on the dedicated local CPU bus. They also provide direct and indirect addressing allowing the CPU to directly address 32 configuration registers or indirectly address them through a REGADDRPTR and REGDATA register requiring only one address line and two memory locations.
NET2270 16-Bit Programmable USB 2.0 Peripheral Controller
NET2272 16-Bit Hi-Speed USB 2.0 Programmable Peripheral Controller
NET2280 PCI Hi-Speed USB 2.0 Programmable Peripheral Controller
The Netchip NET2280 PCI Hi-Speed USB 2.0 Programmable Peripheral Controller is designed for peripherals containing a PCI bus such as Printers, Embedded single board computers, Set top boxes or PCI conversion adaptors.
High Speed USB 2.0 IP Cores
Another increasingly popular solution is to integrate the USB 2.0 SIE (Serial Interface Engine) into a FPGA. However with USB's High Speed signalling running at a differential 480Mbps, a transceiver is required to convert this signal into a TTL/CMOS signal your FPGA can handle. To standardise high speed transceivers and allow portability between transceiver vendors and IP Core vendors, a USB Transceiver Macrocell Interface (UTMI) Specification was produced.
USB 2.0 IP Cores
Tearing your hair out with High Speed Design?
With USB's high speed differential bus and highly complex protocol, what do you do when you want to monitor what is going on between your device and the host? Have you spent days on end hitting your head against the wall? What you need is a USB Protocol Analyser.
Most developers are now thinking this must be expensive. But at what cost do you value a days trial and error when you can't see exactly what is going on. Perhaps the tension is building between the software engineer and the firmware engineer, neither will admit the problem lies with their end.
Ellisys with their hugely popular USB Tracker has come to the rescue of USB 2.0 High Speed developers with the USB Explorer 200.
Additional USB Resources